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Git 05-09-2021 19:49

IDA Processor module segmentation
 
I'm trying to finish writing an IDA cpu module for an old microcontroller which has 64 bytes of internal volatile RAM and 1 kbyte of internal EPROM code space, both starting at address 0x000. My problem is how to create the two segments both with address 0x000 at the start of the segment. Original was written with v70 SDK. Now using v75 SDK and all is working except the segmentation. The cpu does not have segmentation registers.

I had this working 3 years ago but lost the last few versions of source where I sorted the segmentation out. To my knowledge, the only source I ever lost :(

Can anybody help please?
Git

deepzero 05-10-2021 03:10

Are you writing a cpumodule or a loader or both? If there is no segmentation register, then the different memories are accessed by different instructions?

Git 05-10-2021 05:34

CPU module. Code sits in the eprom. Operands that are in RAM are addressed by the operand addressing mode. For example, VARA += VARB :

Code segment :

000 MOV R0, #VARA ; R0 contains address of RAM variable VARA
002 MOV R1, #VARB ; R1 contains address of RAM variable VARB
004 MOV A, @R0 ; Get contents of VARA into accumulator
005 ADD A, @R1 ; Add contents of VARV to accumulator
006 MOV @R0, A ; Put results back into VARA

Data Segment :
000 VARA: .DS 1 ; Reserve 1 byte in RAM for VARA
001 VARB: .DS 1 ; Reserve 1 byte in RAM for VARB

It's a little more complicated in that the registers are in RAM and take 0x00 to 0x17, so RAM variables can start at 0x17. Makes no difference to the problem in hand though.

Git

Mavrick 09-28-2023 04:51

Quote:

Originally Posted by Git (Post 123011)
I'm trying to finish writing an IDA cpu module for an old microcontroller which has 64 bytes of internal volatile RAM and 1 kbyte of internal EPROM code space, both starting at address 0x000. My problem is how to create the two segments both with address 0x000 at the start of the segment. Original was written with v70 SDK. Now using v75 SDK and all is working except the segmentation. The cpu does not have segmentation registers.

I had this working 3 years ago but lost the last few versions of source where I sorted the segmentation out. To my knowledge, the only source I ever lost :(

Can anybody help please?
Git

I can help, if you are still working on this.


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