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IDA 8052 error ?
Here's a snippet of disassembled 8051 code :
Code:
...Git |
According to the 8051/8052 instruction set website, both are correct. Apparently, A8 E0 is a two byte equivalent to F8. Here is a page with more information about 8051/8052 MOV instructions:
Code:
http://www.8052.com/51mov |
I can't see that. MOV R0, A is an unambiguous single byte operation. I think the 2 byte 0xA8 0xNN form you refered to is moving from internal RAM to R0. The Philips data sheet also shows all MOV instrructions between A and Rx are single byte.
Git |
Did you try this freeware utility to compare the disassembly results to that of IDA?
Code:
http://www.bipom.com/dis51.php |
They are equivalent.
The F8 is an explicit single byte instruction to move A to R0. The A8 E0 is actually MOV R0,ACC where ACC is the direct address for the A register. E0 is the direct address for ACC. This A8 E0 is described in the 8051 bible as MOV Rn,direct. |
AP - Ah, I see. What a strange way of doing things. I wonder why the original author choose both methods within a vew lines of each other?
CG - I was going to try some other means of disassembly, but then I realised that the two different op codes in this example were nothing to do with IDA, they existed before and IDA correctly interpreted them, in that A is identical to ACC. The thing at fault is the daft architecture of the 8051. Git |
I think we can blame the original Intel developers for that one. It's an old architecture and in its day it was quite special with its efficient boolean operations. I worked with it professionally for about 20 years and just got to accept the quirks. I wouldn't want to go back to it though.
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Professionally, I used the 9900, bypassed the 8051 and went on to Z80. I played with 68000 family on an amateur basis. 8051 outnumbers the rest of them put together for old design CPU's still in use. A couple of normal 16 bit address registers would have been nice though.
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