In an architectural view of the windows operating system, the HAL(hardware abstraction layer) is indeed the bottom layer of operating system, the kernel (ntoskrnl) sits on top of HAL. Hal presents the kernel a transparent view of underlying hardware interfaces, for example, your keyboard and mouse. Also included are busses, interrupts, timers, DMA, memory cache control, other I/O devices, etc. The HAL take care of all gory details of interacting with all the various hardware interfaces and the kernel doesn't have to burden itself with the details.

In conclusion, HAL is the last layer of software, beneath it it's all hardware or almost! :P

Now onto your 2nd question, from the intel ia32 manual,
highest -> lowest seen by the CPU, 9 levels
hardware reset and machine checks
trap on task switch
external hardware interventions
traps on the previous instruction
external interrupts
code breakpoint fault
faults from fetching next instruction
faults from decoding next instruction
faults from instruction execution

Windows kernel maintains a separate but related IRQL that is 5 bits long (0->31 highest), the user level request is always 0 (passive). There is another form of P.L., inside the IDT descriptor, however this one is related to interrupt handler execution priviledge level (2 bit, ring0 and ring3).

So the lowest of the low is the hardware reset or machine check signal sent to CPU/OS.