Need help with IDA and operand offsets

I sure hope somebody can help.

I'm disassembling a binary for an Mc68332 (Motorola 68k).

Ida is not showing the opeand offsets correctly, and I can't figure out how to change it.

The Ram offsets are not comming up right in IDA. They show $FFFF9414
when it should be $FF9414. The CPU is set for a register base of FF instead of 7F (M1 bit gets set). The TPU ram is being used, and there is some ram on an external I/O chip.

How do I deal with this so I can create a Ram segment?
I tried playing with a few things in IDA, but it either screws things up, or does not make any changes. The help files are weak.


Here is the rest vector code:

:00000500 ResetStart_500:                        
:00000500                 suba.l  a6,a6
:00000502                 move.l  #-$6000,d0
:00000508                 move.l  d0,d1
:0000050A                 move.l  d0,($FFFFFB84).w
:0000050E                 move.l  #$200,d0
:00000514                 move.w  d0,($FFFFFB80).w
:00000518                 movea.l #0,a0
:0000051E                 movec   a0,vbr
:00000522                 move.b  (byte_3C2F).w,(d1.l)
:00000528                 move.b  (byte_3C30).w,(d1.l)
:0000052E                 jsr     (ProcessorSetup_1410).l

The Binary code file size is 512k.
I must have something screwed up


Thanks in advance