Need help with IDA and operand offsets

I sure hope somebody can help.

I'm disassembling a binary for an Mc68332 (Motorola 68k).

Ida is not showing the opeand offsets correctly, and I can't figure out how to change it.

The Ram offsets are not comming up right in IDA. They show $FFFF9414
when it should be $FF9414. The CPU is set for a register base of FF instead of 7F (M1 bit gets set). The TPU ram is being used, and there is some ram on an external I/O chip.

How do I deal with this so I can create a Ram segment?
I tried playing with a few things in IDA, but it either screws things up, or does not make any changes. The help files are weak.


Here is the rest vector code:

:00000500 ResetStart_500:                        
:00000500                 suba.l  a6,a6
:00000502                 move.l  #-$6000,d0
:00000508                 move.l  d0,d1
:0000050A                 move.l  d0,($FFFFFB84).w
:0000050E                 move.l  #$200,d0
:00000514                 move.w  d0,($FFFFFB80).w
:00000518                 movea.l #0,a0
:0000051E                 movec   a0,vbr
:00000522                 move.b  (byte_3C2F).w,(d1.l)
:00000528                 move.b  (byte_3C30).w,(d1.l)
:0000052E                 jsr     (ProcessorSetup_1410).l

The Binary code file size is 512k.
I must have something screwed up


Thanks in advance

It's difficult to say anything advisable whithot seeing it. So
it would be nice if you attach your binary.

Sorry for the slow reply, I have been busy lately.

Ok I have attached the binary.

I was wondering, there is a config file for the HC11 processor as there were many different types. The HC11F1 for example can have it's register base offset. So just make a new entry in the
config file and everything lines up.

There are no configuration paramaters for the 68k in IDA.
You would think this would be important on a CPU you can configure?


Thanks for taking time to help.

Anybody come up with some ideas?

I'm really curious to know if it is something I am doing wrong,
or that's just the way it is.

It's not like I can't work on the file.
Creating ram and register segments over 500mb away from the binary really screws up the ability to scroll though the screen. But I can still get the job done.

Nobody is going to laugh if you are just guessing. I sure as heck
can't figure it out.


Thanks

Originally posted by Ecmhacker
Creating ram and register segments over 500mb away from the binary really screws up the ability to scroll though the screen

Try to use "Alignment" (button 'L') at the start of RAM area. Select the maximum alignment. It will reduce big number of bytes to one string.

I still can't help you with offsets ('FFFF...' instead of 'FF...'). And I dont't understand it fully. Could you give me some Info (or links) about this controller (e.g. assembler spec., memory). I'll try to understand what really must be in code and will search the ways of troubleshooting it in IDA.
And more. Could you say me, pleae, what parameters of RAM and ROM (addresses and sizes) should be set when IDA opens this file.
Thank you.